Open link in next tab
The legend of "x86 CPUs decode instructions into RISC form internally" - Fanael's random ruminations
https://fanael.github.io/is-x86-risc-internally.html
A dive into what x86 instruction are decoded into various processors, to determine the truth of the idea that they're just RISC-like internally.
This is an interesting examination of intel architecture history from the perspective of what micro-ops are used for a simple x86 loop and if they qualify as “RISC”.